Silicon Labs /Series0 /EFM32GG /EFM32GG295F512 /ACMP0 /INPUTSEL

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Interpret as INPUTSEL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH0)POSSEL 0 (CH0)NEGSEL0VDDLEVEL0 (LPREF)LPREF 0 (CSRESEN)CSRESEN 0 (RES0)CSRESSEL

CSRESSEL=RES0, POSSEL=CH0, NEGSEL=CH0

Description

Input Selection Register

Fields

POSSEL

Positive Input Select

0 (CH0): Channel 0 as positive input.

1 (CH1): Channel 1 as positive input.

2 (CH2): Channel 2 as positive input.

3 (CH3): Channel 3 as positive input.

4 (CH4): Channel 4 as positive input.

5 (CH5): Channel 5 as positive input.

6 (CH6): Channel 6 as positive input.

7 (CH7): Channel 7 as positive input.

NEGSEL

Negative Input Select

0 (CH0): Channel 0 as negative input.

1 (CH1): Channel 1 as negative input.

2 (CH2): Channel 2 as negative input.

3 (CH3): Channel 3 as negative input.

4 (CH4): Channel 4 as negative input.

5 (CH5): Channel 5 as negative input.

6 (CH6): Channel 6 as negative input.

7 (CH7): Channel 7 as negative input.

8 (1V25): 1.25 V as negative input.

9 (2V5): 2.5 V as negative input.

10 (VDD): Scaled VDD as negative input.

11 (CAPSENSE): Capacitive sense mode.

12 (DAC0CH0): DAC0 channel 0.

13 (DAC0CH1): DAC0 channel 1.

VDDLEVEL

VDD Reference Level

LPREF

Low Power Reference Mode

CSRESEN

Capacitive Sense Mode Internal Resistor Enable

CSRESSEL

Capacitive Sense Mode Internal Resistor Select

0 (RES0): Internal capacitive sense resistor value 0.

1 (RES1): Internal capacitive sense resistor value 1.

2 (RES2): Internal capacitive sense resistor value 2.

3 (RES3): Internal capacitive sense resistor value 3.

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